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Konu: Python ile ingilizce uygulamasi (3112 Kez okunmuş) önceki konu - sonraki konu

0 Üyeler ve 1 Ziyaretçi konuyu incelemekte.
Python ile ingilizce uygulamasi
Bir tanidigim stm32f103r8t6 ile bir calisma yapiyordu. Ingilizcesi yeterli olmadigi icin zorlandigindan bahsetti.

Bende belki yardimci olur diye "stm32f103r8t6 datasheet CD00161566" pdf dosyasini txt dosyasina cevirdim ve icindeki 3harften buyuk  alfabetik kelimelerden bir liste olusturdum. Yaklasik ~1200 kelime oldu. Diger datasheelerdede benzer bir uslup olacagi icin bu listedeki kelimeleri bilenlere bir faydasi olabilir diye girdi, cikti ve python programini buraya post ediyorum.

pdf->txt cevrimi sirasinda bazi hatalar var bu yuzden yanlis kelimeler var, bazi kelimelerde aslinda teknik kisaltmalar o yuzden bilinmesi gereken kelime sayisi dahada kucuk olacaktir.

Tabii fikir fikirden ustundur benim yaptiklarimdan yola cikarak daha kapsamli ve yararli bir uygulamada yapilabilir.

Python programi:
Kod: [Seç]
""
import os

fin=open("TextFile pdf.txt",mode='r')
lines= fin.readlines()
WordDict={}
LinCnt=0
for line in lines:
    LinCnt = LinCnt + 1
    Words = line.split()
    for Word in Words:
        WordKey = Word.lower()
        if Word.isalpha() and len(Word)>3:
            if WordKey[-3:] == 'ing':
                WordKey = WordKey[-3:]
            elif WordKey[-2:] == 'ed':
                WordKey = WordKey[-2:]

            if WordKey not in WordDict:
                WordDict[WordKey] = Word
fin.close()
WordDictKeys = WordDict.keys()
WordDictKeys.sort()
cnt=0
for WordKey in WordDictKeys:
    print WordDict[WordKey],
    cnt = cnt +1
    if cnt>15 :
        print""
        cnt=0
print ""
print len(WordDict)



Buda cikti dosyasi:
Kod: [Seç]
able abnormal above Absolute access ACCHSI accidentally account accuracy achieve achieves active actual ADCCLK ADCs additional 
address adjacent ADON AERONAUTIC AEROSPACE affect AFIO after against AINx alarm allow allows almost also alternate
Although always Ambient America Among amount analog andpowercontrol another aperture Appendix application applications applies appropriate area
around array aspect assess assumes atrix August Australia automatic automatically AUTOMOTIVE Autoreload availability available Average avoid
Back Backu backup ball ballout band base basic basis batch Battery been before behavior below best
Better between bias binary bitInterfac bits BKIN block board body Boot both BOTTOM buffer Burst BusM
bxCAN byte bytes CADC calculate calculation calendar calibration Canada cannot CANRX CANTX capability capable capacitance Capacitive
capacitor capacitors capture Card care case cases cause caution Cccc ceramic certain Changes Chann channel channels
Chapter characteristics characterization China chip choose chosen circuit circuitry Circuits circular Class classes clock Clocks close
Closely CMOS code codes coefficient column combination come common commonly communicate communication Communications companies Compare compares
comparison compatibility compatible compensate Complementary complete compliant component components comprehensive compromise computational compute condition conditions configurable
configuration conflict conforms conjunction connect connection consists consumption consumptions contact content Contents continue continuously contribution control
Controlle controller Convection Conversion conversions convert converter converters COPYRIGHT Core corner correlation corresponds corruption Cortex could
count counter counters counts cover coverage covers Cparasitic CparasiticVAIN CPHA create Critical Crossover crystal CSSto Cstray
Current currents curve curves cycle Czech damage data Datasheet Date Dbus Debug decimal default definition definitions
degree degrees delay densities density depend dependent depends Description design destination Detail details detect detector determine
development deviation Device devices Dhrystone diagram diameter Differen difference different Differential diffusion digital digits Dimensions diode
directly disable discharge discharges DISCLAIMS dissipation distortion disturbance disturbs division document does domain domains done down
downcounter downgrade Dpad drift drive driven driver drivers drops dual duplex Duty each early embedded edge
either Electrical electromagnetic Electrostatic else embeds emergency emission Enable enables encoder ENDEC endpoint endurance ensure ensures
entire entry environment environmental equal Equation equivalent EQUIVALENTS erase error errors estimate estoppel even event events
exact example examples except exceptional exit exits explicitly Exposure express EXPRESSLY extend extension extensive external externalclock
externally EXTI factor factors fADC fADCCLK failure failures fall family fast FCLK feature Features Feedback fEXT
FFFF fHCLK fHSE fHSI field FIFOs Figure figures filter fine first FITNESS five Flash Flashmemoryendurance flat
flexible FLITFCLK flowchart fLSE fLSI Fmax footnote footnotes footprint footprints FORMALLY formula FORTH fPCLK fPCLKx frame
frames France free freedom frequencies frequency from frozen fSCK fSCL FSMC fTIMxCLK fTRIG full fully function
functional functionality functions further fVCO GAGE gain General generate generation generator Germany give given gives glitch
good GOVERNMENTAL GPIO GPIOA GPIOB GPIOC GPIOD GPIOE GPIOs grade grades grant greater grid ground group
guide guidelines handheld handle hardware have HCLK helps Here herein high higher highly history hold Hong
however humid humidity hysteresis Ibus IDDmax ideal identification identifier identifiers IFIF IINJ Ilkg immediately impedance implements
Important improve inch inches include includes incorporates indentifier Independent independently index India indication indirectly induce industrial
INDUSTRY information INFRINGEMENT mapping Initial inject injection injectnegative input inputcharacteristics inputs instruction integer Integral intellectual interface
interfaces Interference Internal internally interrupt interrupts into Introduction invalidate IrDA Israel issues isters Italy IVDD IVREF
IVSS IWDG IWDGCLK Japan JEDEC Jitter JNTRST joint JTAG JTDI JTDO Junction Kbytes kernel Kingdom Kong
largest laser last late latency Later latest LAWS layout lead leakage least LEDs less letter Level
levels liability license LIFE like limit LIMITATION limits line linearity linearly lines linesVSSVCRStr Link List load
loader local location lock logic logo long lost lower lowernumber lowest LQFP LSBIN LSBOUT machine made
Main maintains make Malaysia Malta manage management MANAGT manner manual manually manuals manufacturer Many mappable mask
maskable Mass master match maximum mean means measurement measurements measures mechanical medical meet meets members Memories
memory message Method MHzCL microcontroller millimeters mils minimal minimize Minimum minus MISO mode model modem modes
modifications modulation moment monitors more MOSI Most motor MSBIN MSBO multimaster multiple multiplication multiplier must name
names natural nearest necessary needs Negative NEND network never NJTRSTTRST noise nominal normal note Notes NRST
nterface number numbers NVIC oblflash occurs ofdatasignalrise offer offers Offset only operate operates operation operations optimization
option Options order orderable oscillation oscillator oscillators other otherwise outline Output outputs outside OUTUT over overhead
overview overvoltage Package Packages pads page paragraph paragraphs Parameter parameters parasitic Part PARTICULAR parts party paste
PDmax Peak perform performance performanceline period periodic periods peripheral Peripherals peripheralsto permanent phase pinout Pinouts pins
PINT PINTmax PIOmax pitch plane platform please PLLCLK PLLMUL PLLSRC PLLXTPRE plus PMOS point points port
ports Positive possible potential potentially power precise Prefetch preliminary prequalification presc Prescaler prescalers present prevent previously
print priority probe problem problems process processor processors product production products profile program programmable programs proper
property protection protects protocol provide provides provisions pulse PURCHASER Purchasers purpose pursuant QFPN quad quadflat quadrature
RADC RAIN range rate ratings reach reaches read reads real receive receiver recommendations reduce reduces redundancy
refer Reference refers register registers registration Regular regulation regulator relation relatively remains Remap remedy replacement replaces
represent represents reprogram Republic request requirement requirements requirment Resale rese reserve reset resistance resistor resistors resolution
resonator respect respective response responsible ResTIM result results retention Revision REXT right rights RISC rise robustness
root rough routine RTCCLK rules runaway safe SAFETY SALE sales same sample samples SBIN scalable scan
scheme schemes Schmitt Schottky scope screen SDIO second Section sections seen select selection sensitivities sensitivity sensor
sentence sequence Serial series service services sets setup Several shall share shares shifterIO short shorter Shortest
shot should shouldbe show shown shows shunt Sigma signal signals signature significantly simple simplex simulation simulations
Simultaneous Since Singapore Single sink sinks size sizes slave Sleep slope Small Smart SmartCard software sold
solder soldermask SOLE solely some SOURC source sourceAC sources space Spain spec specific specification specifications specifies
speeds SPIs spread spurious SRAM stabilization stages Stand Standard standards Standby start startup state statements states
static status stepsand still STMicroelectronics Stop storage store stress Stresses stretch strict strongly subfamily Subject subsidiaries
successive such suffix suitable summary sunk supersedes SUPERVISION supervisor supplies supply Support supports Susceptibility susceptibilty sustain
SWDIO switch switchable switches Switzerland Symbol synchronizable synchronization synchronize SYSCLK Syst System SYSTEMS SysTick Table tables
take taken takes TAmax tape TCoeff tCOUNTER Technical techniques technology Temperature temperatures temporization tERASE term terms
test testconditions tests text TFBGA than that Their them then There therefore therein Thermal These theSTMicroelectronics
They third This those Three threshold through throughout THSE tial time timeout timer timers times timings
TIMx TIMXCLK title tJITTER TJmax tlat tlatr tLOCK TLSE together tolerance tolerant tools Total tough TPIU
tprog Trace TRACECK TRACECLK TRACESWO trademark trademarks transceiver transconductance transfer Transient transition transmission transmit transmitter tree
tRET trfm trials trigger true TSTG tTIMxCLK turn tVDD Twenty type Typical typically UFBGA UFQFPN ultra
under underside unique unit UnitAll UnitNegative Universal Unless Unlike unrecoverable until Upper USART USARTs USBCLK USBDP
useful user userclock uses usually valid validate value values Variations varies various vary VBAT VCRS VDDA
vector vectors VEFTB verify version versus very VFESD VFQFPN VHSEH VHSEL Vhys video VIEW VLSEH VLSEL
void volt voltage voltages Vprog VPVD VREF VREFINT VREFVSSA VRERINT VSENSE VSSA VUSB wait wake wakeup
WARRANTIES warranty watchdog watchdogs waveforms Weak website well whatsoever When where whether which while whole whose
wide width will Window wire with within without WKUP woken word work worst Write WWDG XTAL
Years your zero
1219




Buda girdi:
[code]STM32F103x8
STM32F103xB


Medium-density performance line ARM-based 32-bit MCU with 64
or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 com. interfaces


Features

.
ARM 32-bit Cortex™-M3 CPU Core

-
72 MHz maximum frequency,
1.25 DMIPS/MHz (Dhrystone 2.1)
performance at 0 wait state memory
access
-
Single-cycle multiplication and hardware
division
.
Memories

-
64 or 128 Kbytes of Flash memory
- 20 Kbytes of SRAM
.
Clock, reset and supply management
-
2.0 to 3.6 V application supply and I/Os
-
POR, PDR, and programmable voltage
detector (PVD)
-
4-to-16 MHz crystal oscillator
-
Internal 8 MHz factory-trimmed RC
-
Internal 40 kHz RC
-
PLL for CPU clock
- 32 kHz oscillator for RTC with calibration
.
Low power
- Sleep, Stop and Standby modes
-VBAT supply for RTC and backup registers
.
2 x 12-bit, 1 µs A/D converters (up to 16
channels)

-
Conversion range: 0 to 3.6 V
-
Dual-sample and hold capability
- Temperature sensor
.
DMA
-
7-channel DMA controller
-
Peripherals supported: timers, ADC, SPIs,
I2Cs and USARTs
.
Up to 80 fast I/O ports

-
26/37/51/80 I/Os, all mappable on 16
external interrupt vectors and almost all
5 V-tolerant
Datasheet - production data

VFQFPN36 6 × 6 mm
UFQFPN48 7 × 7 mm


BGA100 10 × 10 mm

LQFP100 14 × 14 mm
UFBGA100 7 x 7 mm LQFP64 10 × 10 mm
BGA64 5 × 5mm LQFP48 7 × 7 mm

.
Debug mode

-
Serial wire debug (SWD) & JTAG
interfaces
.
7 timers

-
Three 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
-
16-bit, motor control PWM timer with dead-
time generation and emergency stop
-
2 watchdog timers (Independent and
Window)
- SysTick timer 24-bit downcounter
.
Up to 9 communication interfaces
-
Up to 2 x I2C interfaces (SMBus/PMBus)
-
Up to 3 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
-
Up to 2 SPIs (18 Mbit/s)
-
CAN interface (2.0B Active)
- USB 2.0 full-speed interface
.
CRC calculation unit, 96-bit unique ID
.
Packages are ECOPACK®
Table 1. Device summary

Reference Part number
STM32F103x8 STM32F103C8, STM32F103R8
STM32F103V8, STM32F103T8
STM32F103xB STM32F103RB STM32F103VB,
STM32F103CB, STM32F103TB

August 2013
DocID13587 Rev 16

This is information on a product in full production.
www.st.com


Contents STM32F103x8, STM32F103xB

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.1 Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2 Full compatibility throughout the family . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.1 ARM® Cortex™-M3 core with embedded Flash and SRAM . . . . . . . . . 14

2.3.2 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.3 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . 14

2.3.4 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.3.5 Nested vectored interrupt controller (NVIC). . . . . . . . . . . . . . . . . . . . . . 14

2.3.6 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.7 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.8 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.9 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.10 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.11 Voltage regulator . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.3.12 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

2.3.13 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.3.14 RTC (real-timeclock) and backupregisters. . . . . . . . . . . . . . . . . . . . . . 17

2.3.15 Timers and watchdogs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

2.3.16 I²C bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.3.17 Universal synchronous/asynchronous receiver transmitter (USART) . . 19

2.3.18 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.3.19 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.3.20 Universal serial bus (USB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2.3.21 GPIOs (general-purpose inputs/outputs) . . . . . . . . . . . . . . . . . . . . . . . . 20

2.3.22 ADC (analog-to-digital converter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.3.23 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2.3.24 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 20

3 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34


2/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB Contents

5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

5.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

5.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.3.1 General operatingconditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

5.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 39

5.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 40

5.3.4 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

5.3.6 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

5.3.7 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

5.3.8 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5.3.9 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

5.3.10 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

5.3.11 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 60

5.3.12 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

5.3.13 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

5.3.14 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

5.3.15 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

5.3.16 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

5.3.17 CAN (controller area network) interface .. . . . . . . . . . . . . . . . . . . . . . . 75

5.3.18 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

5.3.19 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

6 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

6.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

6.2 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.2.1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.2.2 Selecting the product temperature range . . . . . . . . . . . . . . . . . . . . . . . 94


DocID13587 Rev 16 3/105


Contents STM32F103x8, STM32F103xB

7 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

4/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB List of tables

List of tables


Table 1. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Table 2. STM32F103xx medium-density device features and peripheral counts . . . . . . . . . . . . . . . 10
Table 3. STM32F103xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 4. Timer feature comparison.. . .. .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 5. Medium-density STM32F103xx pin definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 6. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 37
Table 7. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 38
Table 8. Thermal characteristics.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 38
Table 9. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 10. Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 11. Embedded reset andpowercontrol block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 12. Embedded internal reference voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 13. Maximum current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 14. Maximum current consumption in Run mode, code with data processing

running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 15. Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 44
Table 16. Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 45
Table 17. Typical current consumption in Run mode, code with data processing

running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 18. Typical current consumption in Sleep mode, code running from Flash or

RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. . 49
Table 19. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 20. High-speed external userclock characteristics.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 21. Low-speedexternal userclock characteristics.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 22. HSE 4-16 MHz oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 23. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 24. HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 25. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 26. Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 27. PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 28. Flash memory characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 29. Flashmemoryendurance and data retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Table 30. EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 59
Table 31. EMI characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 32. ESD absolute maximum ratings.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 33. Electrical sensitivities. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 60
Table 34. I/O current injection susceptibility.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Table 35. I/O static characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Table 36. Output voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 66
Table 37. I/O AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 67
Table 38. NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Table 39. TIMx characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Table 40. I2C characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Table41. SCL frequency (fPCLK1= 36 MHz.,VDD_I2C = 3.3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 42. SPI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Table 43. USB startup time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 44. USB DC electrical characteristics.. . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75


DocID13587 Rev 16 5/105


List of tables STM32F103x8, STM32F103xB

Table 45. USB: Full-speed electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 46. ADC characteristics . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 76
Table 47. RAIN max for fADC = 14 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 48. ADC accuracy - limited testconditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 49. ADC accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 50. TS characteristics. . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 51. VFQFPN36 6 x 6 mm, 0.5 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . 82
Table 52. UFQFPN487x 7 mm, 0.5 mmpitch,packagemechanical data . . . . . . . . . . . . . . . . . . . . 83
Table 53. LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Table 54. LQPF100, 14 x 14 mm 100-pin low-profile quad flat package mechanical data. . . . . . . . . 87
Table 55. UFBGA100 -ultra fine pitch ball grid array, 7 x 7 mm, 0.50 mm pitch, package

mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Table 56. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package mechanical data . . . . . . . . . . 89
Table 57. TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package mechanical data. . . 90
Table 58. LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package mechanical data . . . . . . . . . . . . 92
Table 59. Package thermal characteristics.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 60. Ordering information scheme. . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Table 61. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

6/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB List of figures

List of figures


Figure 1. STM32F103xx performanceline block diagram.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 2. Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 3. STM32F103xx performanceline LFBGA100 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 4. STM32F103xx performanceline LQFP100 pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 5. STM32F103xx performanceline UFBGA100 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 6. STM32F103xx performanceline LQFP64pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 7. STM32F103xx performanceline TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8. STM32F103xx performanceline LQFP48pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 9. STM32F103xx performanceline UFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10. STM32F103xx performanceline VFQFPN36 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 11. Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 34
Figure 12. Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 13. Pin input voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .. . . . 36
Figure 14. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . 36
Figure 15. Current consumption measurement scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 16. Typical current consumption in Run mode versus frequency (at 3.6 V)


code with data processing running from RAM, peripherals enabled. . . . . . . . . . . . . . . . . . 43
Figure 17. Typical current consumption in Run mode versus frequency (at 3.6 V)


code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . . 43
Figure 18. Typical current consumption on VBAT with RTC on versus temperature at different

VBAT values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 19. Typical current consumption in Stop mode with regulator in Run mode versus

temperature at VDD = 3.3 V and 3.6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 20. Typical current consumption in Stop mode with regulator in Low-power mode versus

temperature at VDD = 3.3 V and 3.6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 21. Typical current consumption in Standby mode versus temperature at

VDD= 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 22. High-speed external clock sourceAC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 23. Low-speed externalclock sourceAC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Figure 24. Typical application with an 8 MHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 25. Typical application with a 32.768 kHz crystal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 26. Standard I/O input characteristics - CMOS port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 27. Standard I/O input characteristics - TTL port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Figure 28. 5V tolerant I/O inputcharacteristics - CMOS port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 29. 5V tolerant I/O inputcharacteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 30. I/O AC characteristics definition . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 31. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 32. I2C bus AC waveforms and measurement circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 33. SPI timing diagram - slave mode and CPHA = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 34. SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 35. SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Figure36. USB timings: definition ofdatasignalrise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Figure 37. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Figure 38. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Figure 39. Power supply and reference decoupling (VREF+ not connected to VDDA). . . . . . . . . . . . . . 79
Figure 40. Power supply and reference decoupling (VREF+ connected to VDDA). . . . . . . . . . . . . . . . . 80

VFQFPN36 6 x 6 mm, 0.5 mm pitch, package outline(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82

Figure 41.
VFQFPN36 recommended footprint (dimensions in mm)(1)(2). . . . . . . . . . . . . . . . . . . . . . . . . . . . .82

Figure 42.


DocID13587 Rev 16 7/105


List of figures STM32F103x8, STM32F103xB

Figure 43. UFQFPN48 7 x 7 mm, 0.5 mm pitch, package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 44. UFQFPN48 recommended footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Figure 45. LFBGA100 - 10 x 10 mm low profile fine pitch ball grid array package

outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Figure 46. Recommended PCB design rules (0.80/0.75 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . . . 86
Figure 47. LQFP100, 14 x 14 mm 100-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 87
Figure 48. LQFP100 recommended footprint(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Figure 49. UFBGA100 -ultra fine pitch ball grid array, 7 x 7 mm, 0.50 mm pitch,

package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Figure 50. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 89
Figure 51. LQFP64 recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Figure 52. TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package outline . . . . . . . . . . 90
Figure 53. Recommended PCB design rules for pads (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . 91
Figure 54. LQFP48, 7x 7 mm, 48-pinlow-profile quadflat package outline.. . . . . . . . . . . . . . . . . . . 92
Figure 55. LQFP48 recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 56. LQFP100 PD max vs.TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

8/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB Introduction

1 Introduction

This datasheet provides the ordering information and mechanical device characteristics of
the STM32F103x8 and STM32F103xB medium-density performance line microcontrollers.
For more details on the whole STMicroelectronics STM32F103xx family, please refer to
Section 2.2: Full compatibility throughout the family.


The medium-density STM32F103xx datasheet should be read in conjunction with the low-,
medium- and high-density STM32F10xxx reference manual.
The reference and Flash programming manuals are both available from the
STMicroelectronics website www.st.com.


For information on the Cortex™-M3 core please refer to the Cortex™-M3 Technical
Reference Manual, available from the www.arm.com website at the following address:
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337e/.


2 Description

The STM32F103xx medium-density performance line family incorporates the high-
performance ARM Cortex™-M3 32-bit RISC core operating at a 72 MHz frequency, high-
speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 20 Kbytes),
and an extensive range of enhanced I/Os and peripherals connected to two APB buses. All
devices offer two 12-bit ADCs, three general purpose 16-bit timers plus one PWM timer, as
well as standard and advanced communication interfaces: up to two I2Cs and SPIs, three
USARTs, an USB and a CAN.

The devices operate from a 2.0 to 3.6 V power supply. They are available in both the -40 to
+85 °C temperature range and the -40 to +105 °C extended temperature range. A
comprehensive set of power-saving mode allows the design of low-power applications.

The STM32F103xx medium-density performance line family includes devices in six different
package types: from 36 pins to 100 pins. Depending on the device chosen, different sets of
peripherals are included, the description below gives an overview of the complete range of
peripherals proposed in this family.

These features make the STM32F103xx medium-density performance line microcontroller
family suitable for a wide range of applications such as motor drives, application control,
medical and handheld equipment, PC and gaming peripherals, GPS platforms, industrial
applications, PLCs, inverters, printers, scanners, alarm systems, video intercoms, and
HVACs.


DocID13587 Rev 16 9/105


Description STM32F103x8, STM32F103xB

2.1 Device overview
Table 2. STM32F103xx medium-density device features and peripheral
counts

Peripheral STM32F103Tx STM32F103Cx STM32F103Rx STM32F103Vx
Flash - Kbytes 64 128 64 128 64 128 64 128
SRAM - Kbytes 20 20 20 20
TimersGeneral-purpose 3 3 3 3
Advanced-control 1 1 1 1
Communication
SPI 1 2 2 2
I2C 1 2 2 2
USART 2 3 3 3
USB 1 1 1 1
CAN 1 1 1 1
GPIOs 26 37 51 80
12-bit synchronized ADC
Number of channels
2
10 channels
2
10 channels
2
16 channels(1)
2
16 channels
CPU frequency 72 MHz
Operating voltage 2.0 to 3.6 V
Operating temperatures
Ambient temperatures: -40 to +85 °C / -40 to +105 °C (see Table 9)
Junction temperature: -40 to + 125 °C (see Table 9)
Packages VFQFPN36
LQFP48,
UFQFPN48
LQFP64,
TFBGA64
LQFP100,
LFBGA100,
UFBGA100

1. On the TFBGA64 package only 15 channels are available (one analog input pin has been replaced by
'Vref+').
10/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB Description

Figure 1. STM32F103xx performance line block diagram

USBDP/CAN_TX
PA[ 15:0]
EXTI
WW DG
12bit ADC116AF
JTDI
JTCK/SWCLK
JTMS/SWDIO
NJTRSTTRST
JTDO
NRST
VDD = 2 to 3.6V
80AF
PB[ 15:0]
PC[15:0]
AHB2
MOSI,MISO,SCK,NSS
SRAM
it
WAKEUP
GPIOA
GPIOB
GPIOC
Fmax : 72M Hz
VSS
SCL,SDAI2C2
VREF+
GP DMA
TIM2
TIM3XTAL OSC
4-16 MHz
XTAL 32 kHz
OSC_IN
OSC_OUT
OSC32_OUT
OSC32_IN
PLL &
APB1 : Fmax=24 / 36 MHz
PCLK1
HCLK
CLOCK
MANAGT
PCLK2
as AF
as AF
Flash 128 KB
VOLT. REG.
3.3V TO 1.8V
POWER
Backu p i nterface
as AF
TIM 4
BusM atrix
64 bitInterfac e
20 KB
RTC
RC 8 MHz
Cortex-M3 CPU Ibus
Dbus
pbu s
oblflash
SRAM 512B
Trace
Controlle r
USART1
TIM1
SPI1
USART2
SPI2
bxCAN
7 channels
Back up
reg
4 Chann els
3 compl. Chann els
SCL,SDA,SMBAI2C1
as AF
RX,TX, CTS, RTS,
USART3Temp sensor
VREFPD[
15:0] GPIOD
PE[15:0] GPIOE
AHB:Fmax=48/72 MHz
ETR and BKIN
4 Chann els
4 Chann els
4 Chann els
FCLK
RC 40 kHz
Stand by
IWDG
@VBAT
POR / PDR
SUPPLY
@VDDA
VDDA
VSSA
@VDDA
VBAT
RX,TX, CTS, RTS,
Smart Card as AF
RX,TX, CTS, RTS,
CK, SmartCard as AF
APB2 : Fmax=48 / 72 MHz
NVIC
MOSI,MISO,
SCK,NSS as AF
12bi t ADC2
IF
IFIF
[email protected]
SUPERVISION
PVD
Rst
Int
@VDD
AHB2
APB2 APB 1
AWU
TAMPER-RTC
@VDD
USB 2.0 FS
USBDM/CAN_RX
Syst em
ai14390d
TRACECLK
TRACED[0:3]
as AS
SW/JTAG
TPIU
Trace/trig
CK, SmartCard as AF
1. TA = -40 °C to +105 °C (junction temperature up to 125 °C).
2. AF = alternate function on I/O port pin.
DocID13587 Rev 16 11/105


Description
STM32F103x8, STM32F103xB

Figure 2. Clock tree

HSE OSC
4-16 MHz
OSC_IN
OSC_OUT
OSC32_IN
OSC32_OUT
LSE OSC
32.768 kHz
HSI RC
8 MHz
LSI RC
40 kHz
to Independent Watchdog (IWDG)
PLL
x2, x3, x4
PLLMUL
Legend:
MCO
Clock Output
Main
PLLXTPRE
/2
..., x16 AHB
Prescaler
/1, 2..512
/2 PLLCLK
HSI
HSE
APB1
Prescaler
/1, 2, 4, 8, 16
ADC
Prescaler
/2, 4, 6, 8
ADCCLK
PCLK1
HCLK
PLLCLK
to AHB bus, core,
memory and DMA
USBCLK
to USB interface
to TIM2, 3
and 4
USB
Prescaler
/1, 1.5
to ADC
LSE
LSI
HSI
/128
/2
HSI
HSE
peripheralsto APB1
Peripheral Clock
Enable (13 bits)
Enable (3 bits)
Peripheral Clock
APB2
Prescaler
/1, 2, 4, 8, 16
PCLK2
to TIM1
peripheralsto APB2
Peripheral Clock
Enable (11 bits)
Enable (1 bit)
Peripheral Clock
48 MHz
72 MHz max
72 MHz
72 MHz max
36 MHz max
to RTC
PLLSRC SW
MCO
CSSto Cortex System timer /8
Clock
Enable (3 bits)
SYSCLK
max
RTCCLK
RTCSEL[1:0]
TIM1CLK
TIMXCLK
IWDGCLK
SYSCLK
FCLK Cortex
free running clock
TIM2,3, 4
If (APB1 prescaler =1) x1
else x2
TIM1 timer
If (APB2 prescaler =1) x1
else x2
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
ai14903
FLITFCLK
to Flash programming interface
1.
When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
64 MHz.
2.
For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48
MHz.
3.
To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz.
12/105
DocID13587 Rev 16



STM32F103x8, STM32F103xB
Description

2.2 Full compatibility throughout the family
The STM32F103xx is a complete family whose members are fully pin-to-pin, software and
feature compatible. In the reference manual, the STM32F103x4 and STM32F103x6 are
identified as low-density devices, the STM32F103x8 and STM32F103xB are referred to as
medium-density devices, and the STM32F103xC, STM32F103xD and STM32F103xE are
referred to as high-density devices.

Low- and high-density devices are an extension of the STM32F103x8/B devices, they are
specified in the STM32F103x4/6 and STM32F103xC/D/E datasheets, respectively. Low-
density devices feature lower Flash memory and RAM capacities, less timers and
peripherals. High-density devices have higher Flash memory and RAM capacities, and
additional peripherals like SDIO, FSMC, I2S and DAC, while remaining fully compatible with
the other members of the STM32F103xx family.

The STM32F103x4, STM32F103x6, STM32F103xC, STM32F103xD and STM32F103xE
are a drop-in replacement for STM32F103x8/B medium-density devices, allowing the user
to try different memory densities and providing a greater degree of freedom during the
development cycle.

Moreover, the STM32F103xx performance line family is fully compatible with all existing
STM32F101xx access line and STM32F102xx USB access line devices.

Table 3. STM32F103xx family

Pinout
Low-density devices Medium-density devices High-density devices
16 KB
Flash
32 KB
Flash(1)
64 KB
Flash
128 KB
Flash
256 KB
Flash
384 KB
Flash
512 KB
Flash
6 KB RAM 10 KB RAM 20 KB RAM 20 KB RAM 48 KB RAM 64 KB RAM 64 KB RAM
144 5 × USARTs
4 × 16-bit timers, 2 × basic timers
3 × SPIs, 2 × I2Ss, 2 × I2Cs
USB, CAN, 2 × PWM timers
3 × ADCs, 2 × DACs, 1 × SDIO
FSMC (100 and 144 pins)
100
3 × USARTs
3 × 16-bit timers
2 × SPIs, 2 × I2Cs, USB,
CAN, 1 × PWM timer
2 × ADCs
64 2 × USARTs
2 × 16-bit timers
1 × SPI, 1 × I2C, USB,
CAN, 1 × PWM timer
2 × ADCs
48
36

1.
For orderable part numbers that do not show the A internal code after the temperature range code (6 or 7),
the reference datasheet for electrical characteristics is that of the STM32F103x8/B medium-density
devices.
DocID13587 Rev 16
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Description STM32F103x8, STM32F103xB

2.3 Overview
2.3.1 ARM® Cortex™-M3 core with embedded Flash and SRAM
The ARM Cortex™-M3 processor is the latest generation of ARM processors for embedded
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.

The ARM Cortex™-M3 32-bit RISC processor features exceptional code-efficiency,
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.

The STM32F103xx performance line family having an embedded ARM core, is therefore
compatible with all ARM tools and software.

Figure 1 shows the general block diagram of the device family.

2.3.2 Embedded Flash memory
64 or 128 Kbytes of embedded Flash is available for storing programs and data.

2.3.3 CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.

Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of
the software during runtime, to be compared with a reference signature generated at link-
time and stored at a given memory location.

2.3.4 Embedded SRAM
Twenty Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait
states.

2.3.5 Nested vectored interrupt controller (NVIC)
The STM32F103xx performance line embeds a nested vectored interrupt controller able to
handle up to 43 maskable interrupt channels (not including the 16 interrupt lines of
Cortex™-M3) and 16 priority levels.

.
Closely coupled NVIC gives low-latency interrupt processing
.
Interrupt entry vector table address passed directly to the core
.
Closely coupled NVIC core interface
.
Allows early processing of interrupts
.
Processing of late arriving higher priority interrupts
.
Support for tail-chaining
.
Processor state automatically saved
.
Interrupt entry restored on interrupt exit with no instruction overhead

14/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB
Description

This hardware block provides flexible interrupt management features with minimal interrupt
latency.

2.3.6 External interrupt/event controller (EXTI)
The external interrupt/event controller consists of 19 edge detector lines used to generate
interrupt/event requests. Each line can be independently configured to select the trigger
event (rising edge, falling edge, both) and can be masked independently. A pending register
maintains the status of the interrupt requests. The EXTI can detect an external line with a
pulse width shorter than the Internal APB2 clock period. Up to 80 GPIOs can be connected
to the 16 external interrupt lines.

2.3.7 Clocks and startup
System clock selection is performed on startup, however the internal RC 8 MHz oscillator is
selected as default CPU clock on reset. An external 4-16 MHz clock can be selected, in
which case it is monitored for failure. If failure is detected, the system automatically switches
back to the internal RC oscillator. A software interrupt is generated if enabled. Similarly, full
interrupt management of the PLL clock entry is available when necessary (for example on
failure of an indirectly used external crystal, resonator or oscillator).

Several prescalers allow the configuration of the AHB frequency, the high-speed APB
(APB2) and the low-speed APB (APB1) domains. The maximum frequency of the AHB and
the high-speed APB domains is 72 MHz. The maximum allowed frequency of the low-speed
APB domain is 36 MHz. See Figure 2 for details on the clock tree.

2.3.8 Boot modes
At startup, boot pins are used to select one of three boot options:
.
Boot from User Flash
.
Boot from System Memory
.
Boot from embedded SRAM


The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART1. For further details please refer to AN2606.

2.3.9 Power supply schemes
.
VDD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
Provided externally through VDD pins.

.
VSSA, VDDA = 2.0 to 3.6 V: external analog power supplies for ADC, reset blocks, RCs
and PLL (minimum voltage to be applied to VDDA is 2.4 V when the ADC is used).
VDDA and VSSA must be connected to VDD and VSS, respectively.

.
VBAT = 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
registers (through power switch) when VDD is not present.

For more details on how to connect power pins, refer to Figure 14: Power supply scheme.

2.3.10 Power supply supervisor
The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains


DocID13587 Rev 16
15/105


Description
STM32F103x8, STM32F103xB

in reset mode when VDD is below a specified threshold, VPOR/PDR, without the need for an
external reset circuit.

The device features an embedded programmable voltage detector (PVD) that monitors the
VDD/VDDA power supply and compares it to the VPVD threshold. An interrupt can be
generated when VDD/VDDA drops below the VPVD threshold and/or when VDD/VDDA is
higher than the VPVD threshold. The interrupt service routine can then generate a warning
message and/or put the MCU into a safe state. The PVD is enabled by software.

Refer to Table 11: Embedded reset and power control block characteristics for the values of
VPOR/PDR and VPVD.

2.3.11
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
.
MR is used in the nominal regulation mode (Run)
.
LPR is used in the Stop mode
.
Power down is used in Standby mode: the regulator output is in high impedance: the


kernel circuitry is powered down, inducing zero consumption (but the contents of the

registers and SRAM are lost)
This regulator is always enabled after reset. It is disabled in Standby mode, providing high
impedance output.

2.3.12
Low-power modes
The STM32F103xx performance line supports three low-power modes to achieve the best
compromise between low power consumption, short startup time and available wakeup
sources:

.
Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs.
.
Stop mode
The Stop mode achieves the lowest power consumption while retaining the content of
SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC
and the HSE crystal oscillators are disabled. The voltage regulator can also be put
either in normal or in low power mode.
The device can be woken up from Stop mode by any of the EXTI line. The EXTI line
source can be one of the 16 external lines, the PVD output, the RTC alarm or the USB
wakeup.
.
Standby mode
The Standby mode is used to achieve the lowest power consumption. The internal
voltage regulator is switched off so that the entire 1.8 V domain is powered off. The
PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering

Standby mode, SRAM and register contents are lost except for registers in the Backup
domain and Standby circuitry.
The device exits Standby mode when an external reset (NRST pin), an IWDG reset, a

rising edge on the WKUP pin, or an RTC alarm occurs.

Note:
The RTC, the IWDG, and the corresponding clock sources are not stopped by entering Stop
or Standby mode.


16/105
DocID13587 Rev 16



STM32F103x8, STM32F103xB Description

2.3.13 DMA
The flexible 7-channel general-purpose DMA is able to manage memory-to-memory,
peripheral-to-memory and memory-to-peripheral transfers. The DMA controller supports
circular buffer management avoiding the generation of interrupts when the controller
reaches the end of the buffer.

Each channel is connected to dedicated hardware DMA requests, with support for software
trigger on each channel. Configuration is made by software and transfer sizes between
source and destination are independent.

The DMA can be used with the main peripherals: SPI, I2C, USART, general-purpose and
advanced-control timers TIMx and ADC.

2.3.14 RTC (real-time clock) and backup registers
The RTC and the backup registers are supplied through a switch that takes power either on
VDD supply when present or through the VBAT pin. The backup registers are ten 16-bit
registers used to store 20 bytes of user application data when VDD power is not present.

The real-time clock provides a set of continuously running counters which can be used with
suitable software to provide a clock calendar function, and provides an alarm interrupt and a
periodic interrupt. It is clocked by a 32.768 kHz external crystal, resonator or oscillator, the
internal low-power RC oscillator or the high-speed external clock divided by 128. The
internal low-power RC has a typical frequency of 40 kHz. The RTC can be calibrated using
an external 512 Hz output to compensate for any natural crystal deviation. The RTC
features a 32-bit programmable counter for long-term measurement using the Compare
register to generate an alarm. A 20-bit prescaler is used for the time base clock and is by
default configured to generate a time base of 1 second from a clock at 32.768 kHz.

2.3.15 Timers and watchdogs
The medium-density STM32F103xx performance line devices include an advanced-control
timer, three general-purpose timers, two watchdog timers and a SysTick timer.

Table 4 compares the features of the advanced-control and general-purpose timers.

Table 4. Timer feature comparison

Timer Counter
resolution
Counter
type
Prescaler
factor
DMA request
generation
Capture/compare
channels
Complementary
outputs
Up, Any integer
TIM1 16-bit down, between 1 Yes 4 Yes
up/down and 65536
TIM2, Up, Any integer
TIM3, 16-bit down, between 1 Yes 4 No
TIM4 up/down and 65536


DocID13587 Rev 16 17/105


Description STM32F103x8, STM32F103xB

Advanced-control timer (TIM1)

The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on 6
channels. It has complementary PWM outputs with programmable inserted dead-times. It
can also be seen as a complete general-purpose timer. The 4 independent channels can be
used for

.
Input capture
.
Output compare
.
PWM generation (edge-or center-aligned modes)
.
One-pulse mode output

If configured as a general-purpose 16-bit timer, it has the same features as the TIMx timer. If
configured as the 16-bit PWM generator, it has full modulation capability (0-100%).

In debug mode, the advanced-control timer counter can be frozen and the PWM outputs
disabled to turn off any power switch driven by these outputs.

Many features are shared with those of the general-purpose TIM timers which have the
same architecture. The advanced-control timer can therefore work together with the TIM
timers via the Timer Link feature for synchronization or event chaining.

General-purpose timers (TIMx)

There are up to three synchronizable general-purpose timers embedded in the
STM32F103xx performance line devices. These timers are based on a 16-bit auto-reload
up/down counter, a 16-bit prescaler and feature 4 independent channels each for input
capture/output compare, PWM or one-pulse mode output. This gives up to 12 input
captures/output compares/PWMs on the largest packages.
The general-purpose timers can work together with the advanced-control timer via the Timer
Link feature for synchronization or event chaining. Their counter can be frozen in debug
mode. Any of the general-purpose timers can be used to generate PWM outputs. They all
have independent DMA request generation.

These timers are capable of handling quadrature (incremental) encoder signals and the
digital outputs from 1 to 3 hall-effect sensors.

Independent watchdog

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is
clocked from an independent 40 kHz internal RC and as it operates independently of the
main clock, it can operate in Stop and Standby modes. It can be used either as a watchdog
to reset the device when a problem occurs, or as a free-running timer for application timeout
management. It is hardware- or software-configurable through the option bytes. The counter
can be frozen in debug mode.

Window watchdog

The window watchdog is based on a 7-bit downcounter that can be set as free-running. It
can be used as a watchdog to reset the device when a problem occurs. It is clocked from
the main clock. It has an early warning interrupt capability and the counter can be frozen in
debug mode.

18/105 DocID13587 Rev 16



STM32F103x8, STM32F103xB Description

SysTick timer

This timer is dedicated for OS, but could also be used as a standard downcounter. It
features:
.
A 24-bit downcounter
.
Autoreload capability
.
Maskable system interrupt generation when the counter reaches 0
.
Programmable clock source

2.3.16 I²C bus
Up to two I²C bus interfaces can operate in multimaster and slave modes. They can support
standard and fast modes.

They support dual slave addressing (7-bit only) and both 7/10-bit addressing in master
mode. A hardware CRC generation/verification is embedded.

They can be served by DMA and they support SM Bus 2.0/PM Bus.

2.3.17 Universal synchronous/asynchronous receiver transmitter (USART)
One of the USART interfaces is able to communicate at speeds of up to 4.5 Mbit/s. The
other available interfaces communicate at up to 2.25 Mbit/s. They provide hardware
management of the CTS and RTS signals, IrDA SIR ENDEC support, are ISO 7816
compliant and have LIN Master/Slave capability.

All USART interfaces can be served by the DMA controller.

2.3.18 Serial peripheral interface (SPI)
Up to two SPIs are able to communicate up to 18 Mbits/s in slave and master modes in full-
duplex and simplex communication modes. The 3-bit prescaler gives 8 master mod
  • Son Düzenleme: Şubat 01, 2015, 12:48:11 - Mufit Sozen

Ynt: Python ile ingilizce uygulamasi
Yanıt #1
Adobe Reader XI version 11.0.10

  • Ramazan
  • [*][*][*]
Ynt: Python ile ingilizce uygulamasi
Yanıt #2
çok güzel bir konu  olmuş hocam. Herhangi kaynağı araştırmadan önce yapılacak güzel bir iş.

Ynt: Python ile ingilizce uygulamasi
Yanıt #3
:Aslinda birisi bu 1000 kusur kelimeyi bir check edip onlardaki yanlis yada olmamasi gereken kelimeleri belirlese. Baska datasheetlerde de bunlari gozonunde tutarak datasheetlerde kullanilan "essential" kelimeler belirlenir. 1000kusur kelime 3-4 ayda ogrenilebilir, ingilizcesi yeterli olmayanlarada cok guzel bir yardim olur.
  • Son Düzenleme: Şubat 02, 2015, 22:07:34 - Mufit Sozen

  • Ramazan
  • [*][*][*]
Ynt: Python ile ingilizce uygulamasi
Yanıt #4
@Mufit Sozen hocam ben bu işe talibim. İşi biraz geliştirmemiz gererek ama.
Şöyle bir düşüncem var;


  • Özel olarak 10 Adet datasheet seçeceğiz
    Örneğin PIC16 serileri için 84,628,877,88 vs

  • Bunların çevirilerini yapıp kelimeleri ortaya çıkartacağız. (buraya kadar mevcut zaten)

  • Dosyaları birleştireceğiz

  • Yeni dosyayı kendi içinde karşılaştırma yapıp, dosyanın içinde en çok geçen kelimelerden en az geçen kelimelere göre sıralayacağız

  • En son oluşan dosyanın içindeki hataları "istisna" adında bir dosyaya kaydedeceğiz (manuel)
    Hatalı kelimeler (XXX gibi) burada dosyanın sonuna sıralanacağı için işimiz kolay olacak (copy/paste)

  • Sonraki çevirilerde istisnalar hariç tutularak hatalı çevirileri minimize edilmiş olacak



Bu arada çıktıyı adnı kendimiz belirlediğimiz, .txt formatında bir dosyaya kaydedecek şekilde güncelledim. Son durum bu;
Kod: [Seç]
import os

fin=open("TextFile pdf.txt",mode='r')
lines= fin.readlines()
WordDict={}
LinCnt=0
for line in lines:
    LinCnt = LinCnt + 1
    Words = line.split()
    for Word in Words:
        WordKey = Word.lower()
        if Word.isalpha() and len(Word)>3:
            if WordKey[-3:] == 'ing':
                WordKey = WordKey[-3:]
            elif WordKey[-2:] == 'ed':
                WordKey = WordKey[-2:]

            if WordKey not in WordDict:
                WordDict[WordKey] = Word
fin.close()
WordDictKeys = WordDict.keys()
WordDictKeys.sort()
name = raw_input('Enter name of text file: ')+'.txt'
try:
       file = open(name,'a')
except:
        print('Something went wrong! Can\'t tell what?')
       sys.exit(0)
for WordKey in WordDictKeys:
file.write(WordDict[WordKey]+" ")
WordCount = len(WordDict)
print ("Total Word: {}".format(str(WordCount)))



  • Son Düzenleme: Şubat 04, 2015, 16:24:16 - Ramazan

Ynt: Python ile ingilizce uygulamasi
Yanıt #5
Ramazan hangi datasheetleri istiyorsan bana data linklerini lutfen yolla.

Ben bir is bolumu yaptim, ingilizce kelime dosyasini kontrol ederek istisna kelimeleri check etmek tabiiki senin angaryan oldu! :)

bu nasil olsa bir kere yapilacak bir is ve cok zamanda almasina gerek yok.

Girdi olarak bir dosyaya:
1.satir: girdi olacak datasheet.txt dosyalarin listesi
2.satir: istisna kelimelerin oldugu dosya adi
3.satir: cikti dosyasi adi (Ingilizce kelime listesinin oldugu)

yazariz.

Ben bugun vakit bulursam bu programi yazmaya calisirim.

  • Ramazan
  • [*][*][*]

Ynt: Python ile ingilizce uygulamasi
Yanıt #7
kusura bakmayın olayı çözemedim. tam olarak nedir bu olay ?

Saygılar.

Ynt: Python ile ingilizce uygulamasi
Yanıt #8

kusura bakmayın olayı çözemedim. tam olarak nedir bu olay ?

Saygılar.


Sayin Birol Yilmaz, turkce datasheetler ve teknik kitaplar gibi kaynaklarin eksikligi ortada. Ulkemizdeki egitim sistemininde ingilizce ogretiminde cok basarisiz oldugu herkesin malumu. Ingilizce ogreten yardimci kurumlarida yabanci dilde okuyup anlamaktan daha cok gramer ve karsilikli iletisim vb daha kapsamli amaclara donuk olmasi nedeni ile yabanci dil egitiminin cok pahali, zahmetli ve uzun olmasida oyle.

Halbuki elektrik, Elektronik kaynaklarda kullanilan kelimeler oldukca sinirli. Ustelik bu dokumanlarda edebi anlatimlar olmadigi icin cumle yapisi ve gramer kurallarida cok basit ve az sayida.

Bu yuzden piyasada cok kullanilan MCU (ST'nin rm Cortex ve Microchip PIC'ler) datasheetlerinde kullanilan ingilizce kelimelerden bir liste yapilmasi, bu dokumanlari kendi kendine ogrenmeye calisan arkadaslara cok faydali olabilir diye dusunduk. Bu listeye sahip olan birisi Google Translate ozelligini kullanarak kelimelerin anlamini ve telafuz edilis seklinide kendi basina ogrenebilir.

Bu fikir bir sonraki adimdada baska yardimci materyal ile desteklenebilir (bu konudada zihni sinir cozumlerimiz mevcuttur  :) )

Neyse Ramazan ben senin verdigin listeyide kullanarak hizli ve baskalarina gostermekten gurur duymuyacagim kalitede bir program yazdim. Fakat gordumki buldugumuz kelimelerin ingilizce olup olmadiginida kontrol etmezsek yazim hatalari, pdf->txt cevrim hatalari ve teknik terimlerde listede cikiyor.

Ingilizce kelimler listesi olarak 'Moby Lexicon calismasinin sonucu olan Moby Word listesini kullandim(610,000+ words and phrases. The largest word list in the world)  http://icon.shef.ac.uk/Moby/

Neyse bu program sonucunda iki liste elde ettim:

onlari buraya ekliyorum:
Kelimler listesi: (2335 kelime)
Kod: [Seç]
ability able abnormal abort aborts about above Absolute absolutely accept acceptable access accesses accessible accidental accidentally 
accomplish accordance accordingly account accuracy accurate achieve achieves Acknowledge Acquisition across action actions activates active Activity
acts actual actually adapter ADCs adders addition additional additions Addr address Addressable Addresses adds adjacent adjust
Adjustment adjusts Advance advantage advantageous advantages adversely affect affects afford affordable after again against agrees AINx
alarm algorithms allow allowable allows almost Alone along Alphanumeric already also alter alternate Although always Amax
Ambient America Among amount Amplifier analog Analysis analyze analyzer Angeles Angle another anyone apart aperture appear
appears Appendix applicable application applications applies apply appropriate appropriately approval approximately approximation arbitrate arbitration architecture archives
area areas arise arithmetic Arizona around array Arrows Articles Asia aspect aspects assemble assembler assembly assert
assertion asserts assess assign assignable assignment assignments assist assistance assume assumes assure Asynchronous asynchronously Atlanta attach
attempt Attempts August Austin Australia Austria Auto automatic automatically automotive availability available Average avoid awake awaken
back background backup backward ball band Bangkok bank banks base Baseline basic Basics basis batch Battery
Baud because become becomes been before begin begins behave behavior Belgium believes belongs below Benex Berkshire
best Better between beyond bias bidirectional binary bits black Blank block blocks board boards body book
Boot borrow Boston both bottom boundaries boundary branch branches Brazil breach break breakdown bridge brief briefly
brings broadcast broken brought Brownout browser buffer buffers bugger build built bulk Burst buses Business busy
button buttons buyer byte bytes cable cables calculate calculation calculations calendar calibrates calibration California call CALLis
CALLor calls Canada cancels cannot capabilities capability capable capacitance Capacitive capacitively capacitor capacitors capture captures card
care careful cares Carrier Carry case cases categories cause causes caution ceases Cell cells Center centers
Centre Centro ceramic certain certification Chambers Chamfer Chandler Change changeover Changes channel channels Chapter character characterist
Characteristic characteristics characterization characters charge check checksum Chicago China chip choice choices choose chosen circuit circuitry
Circuits circular City clamp Clara clarification Class classes Clear clears Cleveland click clock Clocks close Closely
clrf code codes Coeff coefficient coincident coincides collector Collision color column combination combinations combines come comes
command commands commences comments Commercial common commonly commons communicate communication Communications companies Company Comparator Comparators Compare
compares comparison compatibility compatible compensate competitive compile Compiler Compilers complement Complementary complete completely completes completion complex
compliant component components comprehensive compromise computation computational compute concurrent condition conditional conditions Condominium conduct conducts Conferences
configurable configuration Configurations configure configures confirm conflict conform conforms conjunction connect connection connections Connector Connects consecutive
consecutively consequence conserve considerably consideration Considerations Consistency consists constant constantly construct construction consult consultant consume consumes
consumption consumptions contact contain contains content contention Contents Context continuation continue continues continuous continuously contribution control
controller controllers controls Convection convenience convenient Conversion conversions convert converter converters copies Copy Copyright Core corner
Corporate correct corrections correctly correlation corresponds corruption Cortex cost costs could count counter counters Country counts
cover coverage covers create creation Critical cross crosses Crossover crystal crystals cumulative Current currently currents curve
curves custom customer customers Customizable cycle cycles Czech Dallas damage data Date daughter Dayton deal Debug
Debugger Debuggers debugs decides decimal Decode decoder decreases Decrement decrements deep default defaults definition definitions degrade
degree degrees delay delays deletion deletions Delhi delta demo demonstrate demonstrates Demonstration demultiplexer Denmark denotes densities
density Department depend dependant dependent depends depict depression derive derives describe Description descriptions design designator designer
destination destructive detachable Detail details detect detection detector detects determination determine determines Detroit develop Developer developers
development devi deviates deviation Device devices diagram Diagrams diameter dictate differ difference differences different Differential differentiate
differentiates differentiation differently differs diffusion digit digital digitally digits Dimension Dimensions diode diodes Direct Direction directive
Directives directly directs disable Disables discharge discharges disclaims discrete discusses discussion dishonest display dissipation Distance distinct
distortion distribution Distributor distributors disturbance disturbs divide divider division divisions document documentation does domain domains done
double down downgrade download downloads Draft Drag drain draw draws drift drive driven driver drivers drives
drop drops dual DuCy Dummy duplex duration Duty dynamic each earlier early ease easier easily East
easy economical embedded edge edges edit editor effect effective effectively effects Efficient efficiently eight eighth either
elapses Electrical electromagnetic Electrostatic eleven eliminate eliminates elimination else embeds emergency emission empty emulate emulation Emulator
emulators Enable enables encoder endpoint ends endurance engineer England enhance enough ensure ensures enter entire entirely
entry environment environmental equal equals Equation equivalent eral erase erases Erie errant Errata error errors especially
essential establish estimate estoppel Ethernet Evaluation even event events eventual every exact exactly examination example examples
excellent except exception exceptional excess excessive Exclusive exclusively executable Execute executes execution exist exists exit exits
expansion expenses expensive experience expire explicitly exponential Exposure express extend extends extension extensions extensive external externally
extra extraction fabrication facilitate facilities fact factor factors factory Fail fails failure failures fall falls false
families family fast faster favorite feature Features Feedback fetch field fields FIFOs fifteen fifth Figure figures
File files filter Final Financial find fine Finland firmware first five flag flags Flash flat flexibility
flexible float floats Floor flow flowchart fluctuations focuses follow follows Fong Foot footnote footnotes footprint footprints
force forces Foreign Form format formats forms formula formulas forth forward found four fourteen fourth fragments
frame frames France free freedom Freq frequencies frequency Frequently friendly from frozen full fully function functional
functionality functionally functions further future Gage gain Gate Gateway General generally generate generates generation generator generic
generous Germany GestIC give given gives glitch global goes gone good goto GOTOs grade grades gradual
grant Graph graphical Graphs greater greatly grid ground group guarantee guard guidance guide guidelines guides half
halt halts Handbook handle happen happens Harbour hardware harmless have header headers heart heavy Height held
help helpful helps Here herein hexadecimal high higher highest highly Highway history hold holds Hong Hongkong
hookup host Hotel hours however humid humidity hysteresis ideal ideally identical identification identifier identifiers Idle idles
ignore Ilkg illegal illustrate illustrates illustration imitate immediate immediately impact impedance implement Implementation implementations implements implicitly
implies Important improve improvements inability inaccuracies inactive incf inch inches include includes Inclusive incomplete incorporates incorrect
increase increases Increment increments indemnify Independent independently indeterminate index India Indianapolis indicate indicates indication Indicator Indirect
indirectly individual individually induce industrial inexpensive infinite information informational infrequently infringement mapping inhibit Inhibits Initial Initialization
Initialize initially initiate Initiates inject injection input inputs insensitive insert Inside inspection Inst instead instruction Instructions
integer Integral Integration integrity intellectual intensive intention Interaction interactions interacts Interchangeable Interconnect interconnection interface interfaces Interference
intermediate Internal internally International Internet interrupt interrupts interval intervals into introduce Introduction Invalid invalidate inverse Inversion
Invert inverter inverts irrelevant irrespective Isolation Israel issues Italy itself January Japan Jeremy Jitter joint Jose
July jump jumpers jumps Junction junctions just justify keep keeps kept kernel Kerry keypad keys kind
kinds Kingdom Kits know known Kong Korea label laboratory ladder language large larger largest laser last
Latch latches late latency Later latest latr latter layout lead leads leakage learn least leave leaves
LEDs Left Length less letter letters Level levels liability Liaison Librarian libraries library license licenses life
like limit limits line Linear linearity linearly lines Link linker Links liquid List listings lists Literal
literature little load loader loads local location locations lock logic logo long longer loop lose loss
lost lots lower Lowercase lowest machine macro macros made Madrid Main mainly maintain maintainability maintainable maintains
majority make makes Malaysia Malfunction Malta manage management manager manages Manila manipulation manner manual manually manuals
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present press Prestige prevent prevents previous previously price primarily primary Prime print prior priority probe problem
problems procedure procedures process processes processor processors produce produces product production products profile prog program programmable
programmer Programmers programs progress project projects proper properly property protect protection protects protocol prototype protrusions provide
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request requests require requirement requirements requires Resale reserve reset Resets resistance Resisters resistor resistors resolution resonator
Resonators Resource resources respect respective respectively respond responds response responsibility responsible rest restart restarts Restore restores
Restrictions result resultant results resume resumes resumption retain retains retention retransfer retrieve return returns reverse revert
reverts Revision revisions Revisit rewrite Rich right rights ripple rise rises Road robustness Rocky role rollover
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2335


Ingilizce olmiyan kelimler listesi: 358 kelime, Bunlerin bir kismi teknik terim(Kbyte gibi) bir kismi girdi dokumanindaki hatalardan kaynaklana yanlis kelimeler vb

Bir ara elim deydiginde teknik terimlerdende bir kelime listesi yapip onuda programda referans olarak kullanacagim. Boylece ister istemez birde teknik kelimler listemiz olacak :)

Kod: [Seç]
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aximum Ballerup ballout Bangalore Batiment becauseSSPBUF Beidajie Bentham bfff bitsMOVWF bitsResolution Breakcontrol Brianza BSFor btfss BusMatrix
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dfff Dhrystone Direzionale Divyasree Dmax downcounter Dpad Drunen DSCs dsPIC edgeof EdgeSelect EEPROMs EnableClock Epson Eskdale
Etage EXTIpw fallingedge Farmington ffff FFFFh FixedRef Flatpack fTIMxCLK Fujian Fuzhou glitchless GmbH GPIOs handheld Hangzhou
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inputsMOVWF insoftware instruc IntegratedDevelopment InternetWeb interruptat InterruptService INTmax IOmax IrDA isclear isstill JAvalue jection Jmax Kanagawa
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lowbyte Lowell lowSample lowwhile LSbBit LSbMSb LSbs LSByte Lumpur masterReset masterterminatestransfer masterterminatestransferSSPOV mAVss MCUs MCxOUT MemoryMOVWF
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PICkitTM PICmicro PICmicroNote pinout Pinouts PINTmax placeof plete pointerBTFSS pointerMOVWF Postscale postscaler PowerSmart Prefetch preload prescale
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TimingGeneration TIMxCLK TioF tion TioR tlat tlatr TmcL TMRxIF toComparator toolbar TppS tprog TriggerBuffer TriggerInputBuffer TRISn
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358


Simdi bu listelerin uzerinden giderek bir sonraki adimda neler yapacagimizi belirleriz.
yazdigim python programi musvetteside asagida:

Kod: [Seç]
""
import os

def input_files(NameFile):
    fin=open(NameFile,mode='r')
    lines=fin.readlines()
    fin.close()
    files=[]
    for line in lines:
        FileName=line[:-1]
        if os.path.exists(FileName):
            files.append(FileName)
        else:
            print "File does not exist:", FileName
    return files
# --------------------------
def getWords(FileName,WordDict,EngDict,NotInDict):
    Abbrv=[]
    LinCnt=0
    fin=open(FileName,mode='r')
    lines= fin.readlines()
    fin.close()
    for line in lines:
        LinCnt = LinCnt + 1
        Words = line.split()
        for Word in Words:
            WordKey = Word.lower()
            if Word.isalpha() and len(Word)>3 :
                if Word.isupper() or Word[1:].isupper():
                    if Word not in Abbrv:
                        Abbrv.append(Word)
                else :
                    if WordKey[-3:] == 'ing':
                        WordKey = WordKey[-3:]
                    elif WordKey[-2:] == 'ed':
                        WordKey = WordKey[-2:]

                    if WordKey not in WordDict:
                        if WordKey not in EngDict:
                            if WordKey[:-1] not in EngDict:
                                if WordKey not in NotInDict:
#                                    print Word,"not in english dictionary!"
                                     NotInDict[WordKey] = Word
                            else:
                                 WordDict[WordKey] = Word
                        else:
                            WordDict[WordKey] = Word


    return WordDict

# ----------------------------
def EngDictWords():
    Dict=[]
#   fin=open("mit english words.txt",mode='r')
    fin=open("Moby Words.txt",mode='r')
    lines=fin.readlines()
    fin.close()
    for line in lines:
        Dict.append(line[:-1].lower())
    return Dict
# ----------------------------
def DictPrint(WordDict,NameDict):
    print "---"
    print "Dictionary Name", NameDict
    WordDictKeys = WordDict.keys()
    WordDictKeys.sort()
    cnt=0
    for WordKey in WordDictKeys:
        print WordDict[WordKey],
        cnt = cnt +1
        if cnt>15 :
            print""
            cnt=0
    print ""
    print len(WordDict)
    return WordDict
# ----------------------------
WordDict={}
EngDict={}
EngDict = EngDictWords()
NotInDict={}
for FileName in input_files("FileList.cfg"):
    getWords(FileName,WordDict,EngDict,NotInDict)
    print len(WordDict), FileName
DictPrint(WordDict,"WordDict")
DictPrint(NotInDict,"NotInDict")
  • Son Düzenleme: Şubat 06, 2015, 20:21:12 - Mufit Sozen

Ynt: Python ile ingilizce uygulamasi
Yanıt #9
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